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Integrated circuit design and computer architecture for high performance computing

Country of Origin: Sweden
Reference Number: TRSE20190812001
Publication Date: 12 August 2019

Summary

A Swedish SME has developed a compression/decompression technology to store more information onto a memory chip. The technology can be implemented in System-on-a-Chip (SoC) for smartphones, tablets, computers, servers, etc. The company wants to develop the technology further and is now looking for experts in ASIC design (Application Specific Integrated Circuit) and computer architecture that would be interested in entering a research and/or technical collaboration agreement.

Description

The Swedish company working for the ICT sector have developed a unique way to store more information onto a memory chip without changing the physical number of transistors. The patented compression/decompression technology can be implemented in SoC going into smartphones, tablets, computers, servers, etc. An increase of the main memory will enhance computing devices performance while reducing power consumption and costs. 

The company is now in a phase where they want to increase their knowledge in high-performance computing even further and is looking for expertise that would be interested in entering a research and/or technical collaboration agreement.

Specifically, the company is looking for experts with knowledge and experience in ASIC design/physical implementation, computer architecture (memory hierarchies/management), IP block development (distribution with encryption), SoC processor chip development, and Linux kernel development, particularly related to memory management.

The expected outcome of a technical cooperation would be increased knowledge and improved products. The cooperation could also lead to a discussion about further collaboration in specific publicly funded R&D-project (regional/national/EU).

Expertise sought

The experts should have experience and knowledge in the following areas:
- ASIC design, particularly in physical implementation
- Computer architecture, in memory hierarchies and memory management.
- IP block development and distribution with encryption
- SoC processor chip development.
- Linux kernel development, particularly related to memory management.

Requested partner

- Type of partner sought: industry, academy, research

- Specific area of activity of the partner: High-performance computing and memory management. In particular, ASIC design/physical implementation, computer architecture (memory hierarchies/management), IP block development (distribution with encryption), SoC processor chip development, and Linux kernel development related to memory management.

- Tasks to be performed by the partner. To present documented expertise and related experience in high-performance computing and memory management and to describe how the requests from the Swedish SME can be met. A meeting in person would be expected at site in Sweden to discuss collaboration details and to negotiate and decide on a technical cooperation agreement and/or a research cooperation agreement (that could lead to a R&D project in the future).

Cooperation offer ist closed for requests